1. Field of the Invention
The present invention relates generally to semiconductor packages, and more particularly to a semiconductor package having increased input/output (I/O) density and a method a fabricating the same.
2. Description of the Related Art
Semiconductor dies are conventionally enclosed in plastic packages that provide protection from hostile environments and enable electrical interconnection between the semiconductor die and an underlying substrate such as a printed circuit board (PCB) or motherboard. The elements of such a package include a metal leadframe, an integrated circuit or semiconductor die, bonding material to attach the semiconductor die to the leadframe, bond wires which electrically connect pads on the semiconductor die to individual leads of the leadframe, and a hard plastic encapsulant material which covers the other components and forms the exterior of the semiconductor package commonly referred to as the package body.
The leadframe is the central supporting structure of such a package, and is typically fabricated by chemically etching or mechanically stamping a metal strip. A portion of the leadframe is internal to the package, i.e., completely surrounded by the plastic encapsulant or package body. Portions of the leads or I/O pads of the leadframe extend externally from the package body or are partially exposed therein for use in electrically connecting the package to another component, such as a printed circuit board or PCB. One portion of the leadframe which is internal to the package is commonly referred to as a die pad. The die pad is typically used as a support structure for one or more semiconductor dies which are also internal to the package. In many leadframe designs, the die pad is supported within the interior of an outer frame of the leadframe by multiple tie bars which extend between the outer frame and respective corners of the die pad. Tie bars are also often used to attach the individual leads of the leadframe to the outer frame thereof.
In the electronics industry, hand held portable applications such as cell phones, PDA's (Personal Digital Assistants), Bluetooth, and IMT2000 require semiconductor packages which are progressively smaller and lighter, yet of increasing performance. In many of the above-described conventional semiconductor packages wherein portions of the leads are partially exposed within the package body, such leads are typically included along only the peripheral edge of the package body. To meet the requirements of current hand held portable applications, the semiconductor packages used therein must have higher electrical performance and functionality, and thus increased numbers of leads or I/O pads which are electrically connectable to an external device. In addition to increased numbers of leads or I/O pads, it is also desirable for such semiconductor packages to be provided with a separate ground ring and/or power ring.
However, one of the drawbacks associated with conventional leadframe designs is that the tie bars needed to support the die pad, ground ring, or power ring within the outer frame of the leadframe occupy a substantial amount of space which could otherwise be used to accommodate additional leads or I/O pads of the leadframe. Additionally, the typical need to attach each of the leads or I/O pads to the outer frame of the leadframe via a separate tie bar also restricts the density at which such leads or I/O pads may be provided in the leadframe. Although it has been suggested in the prior art to narrow the pitch of the leads formed at the periphery of the bottom surface of the package body to increase the number of leads, there are physical limitations in narrowing the lead pitch during the manufacture of the leadframe. Also, excessive narrowing in the lead pitch gives rise to a susceptibility of solder shorting between the leads when the semiconductor package is connected to an external device through the use of solder.
Other currently known semiconductor package designs provide increased numbers of leads by arranging the leads on a common surface of the package body in multiple rows and columns. However, the manufacturing methodology associated with such semiconductor package designs typically involves the completion of a sawing process wherein a saw blade is advanced completely through portions of the leadframe and partially into portions of the package body of the semiconductor package. More particularly, the advancement of the saw blade through portions of the leadframe effectively electrically isolates such portions from each other in a manner facilitating the formation of the multiple columns and rows of leads. However, as a result of the sawing or singulation of the leadframe to facilitate the formation of the leads, the saw blade must necessarily cut into the surface of the package body in which the surfaces of the leads connectable to an underlying substrate are exposed. In these semiconductor packages, the sawing process gives rise to frequent occurrences of chip-out in the package body, as well as the formation of minute cracks in the leads. As a result, the completed semiconductor package may have a weakened mechanical structure. Moreover, the partial cutting of the package body as occurs during the sawing of the leadframe to facilitate the formation of the leads is somewhat unsightly due to the resultant grooves or scratches formed in the corresponding surface of the package body. Further difficulties arise as a result of the mechanical stresses applied to the package body during the sawing process. These and other difficulties are addressed by the semiconductor package manufacturing methodology of the present invention, as will be described in more detail below.